Various serial communication techniques may be employed in different scenarios. For reliable communication, some techniques may require that both data and sampling clock signals be sent over separate wires. Among the various techniques, two-wire or two-channel communication techniques such as synchronous, non-return to zero (NRZ), and bipolar return-to-zero (BRZ). In synchronous communications an explicit clock signal is transmitted on a separate wire. NRZ is an encoding method where a logic ‘1’ is transmitted as a high value and a logic ‘0’ is transmitted as low value (or vice versa also where a logic ‘1’ is transmitted as a low value and a logic ‘0’ is transmitted as a high value). An NRZ signal can be transmitted ion a single wire, but it will be very unreliable to get the correct bits at the receiver without an explicit clock. BRZ is an encoding or signaling method where the signal returns to a rest state between high and low states, usually referred to as zero state. A BRZ signal can be transmitted on a single wire and bits may be recovered reliably at the receiver because a BRZ signal has an edge available in each bit period.
Among the various communication techniques, one-wire or one-channel encoding techniques such as Manchester and 8b/10b may employ complicated phase-locked loop (PLL), delay-locked loop (DLL) circuits, and training sequences to recover an embedded sampling clock signal. Manchester encoding is a method of translating a logic ‘1’ into a low to high transition and a logic ‘0’ into a high to low transition (or vice versa, original ‘1’→01, original ‘0’→10, and vice versa). Furthermore, 8b/10b is a method of encoding 8-bit data bytes to 10-bit transmission characters. There is a need for an encoding technique and a corresponding sampling clock recovery technique where an encoded signal comprising data and sampling clock signals may be transmitted on a single-wire. There is a need for an encoding technique to generate an encoded signal as a serial bit stream and a corresponding clock recovery technique that does not require complicated PLL/DLL circuits and training sequences to recover the sampling clock signal.